Yasuhiro Morita received the IEEE System LSI Technology Award at the 11th LSI Workshop.

At poster session of the eleventh system LSI workshop held in Kitakyushu City on November 19-21, 2007, D3 Yasuhiro Morita announced “Design of small area / low voltage operation 8T SRAM under DVS environment – 8th cell realizes small area / low voltage operation at the same time – 32nm generation and beyond – “received the IEEE System LSI Technology Award.