Y.Morita announced at 2006 Symposium on VLSI Circuits held in Hawaii.

In International Symposium on VLSI Circuits held in Hawaii, USA from 15th to 17th June 2006, D2 Mr. Y.Morita announced.

• Y. Morita, H. Fujiwara, H. Noguchi, K. Kawakami, J Miyakoshi, S. Mikami, K. Nii, H. Kawaguchi, and M. Yoshimoto, “A Vth-Variation-Tolerant SRAM with 0.3-V Minimum Operation Voltage for Memory-Rich SoC under DVS Environment,” 2006 Symposium on VLSI Circuits Digest of Technical Papers, pp.16-17, Honolulu, Hawaii, USA, June 2006.